Volume 42; Issue 4

IEEE Transactions on Computers

Volume 42; Issue 4
3

A polynomial time algorithm for reconfiguring multiple-track models

Varvarigou, T.A., Roychowdhury, V.P., Kailth, T.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 1.04 MB
english, 1993
4

Branch target buffer design and optimization

Perleberg, C.H., Smith, A.J.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 1.80 MB
english, 1993
5

Systematic design of pipelined recursive filters

Lapointe, M., Huynh, H.T., Fortier, P.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 1.20 MB
english, 1993
6

A systolic redundant residue arithmetic error correction circuit

Di Claudio, E.D., Orlandi, G., Piazza, F.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 567 KB
english, 1993
7

Multibit correcting data interface for fault-tolerant systems

Redinbo, G.R., Napolitano, L.M., Jr., Andaleon, D.D.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 1.28 MB
english, 1993
8

Computational complexity issues in operative diagnosis of graph-based systems

Rao, N.S.V.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 1.22 MB
english, 1993
9

Design and analysis of cache coherent multistage interconnection networks

Nanda, A.K., Bhuyan, L.N.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 1.41 MB
english, 1993
10

Reducing interference among vector accesses in interleaved memories

Raghavan, R., Hayes, J.P.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 1.23 MB
english, 1993
11

Architectures for exponentiation over GD(2n) adopted for smartcard application

Arazi, B.
Journal:
IEEE Transactions on Computers
Année:
1993
Langue:
english
Fichier:
PDF, 462 KB
english, 1993