Volume 13; Issue 5

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IEEE Transactions on Computer-Aided Design of Integrated...
Volume 13; Issue 5

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volume 13; Issue 5

1

Algorithms for simulation of three-dimensional etching

Toh, K.K.H., Neureuther, A.R., Scheckler, E.W.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 797 KB

english, 1994

2

Functional synthesis of digital systems with TASS

Amellal, S., Kaminska, B.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 1.28 MB

english, 1994

3

Identification of redundant delay faults

Brand, D., Iyengar, V.S.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 1.12 MB

english, 1994

4

A portable parallel algorithm for logic synthesis using transduction

De, K., Ramkumar, B., Banerjee, P.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 1.26 MB

english, 1994

5

Optimization of state encoding in distributed circuits

Lam, P.N., Li, H.F., Leung, S.C.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 688 KB

english, 1994

6

Satisfaction of input and output encoding constraints

Saldanha, A., Villa, T., Brayton, R.K., Sangiovanni-Vincentelli, A.L.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 1.33 MB

english, 1994

7

Optimal algorithms for bubble sort based non-Manhattan channel routing

Chen, C.Y.R., Hou, C.Y., Singh, U.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 651 KB

english, 1994

8

Analytical MOSFET model for quarter micron technologies

Miura-Mattausch, M.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 428 KB

english, 1994

9

SWiTEST: a switch level test generation system for CMOS combinational circuits

Kuen-Jong Lee, Njinda, C.A., Breuer, M.A.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 1.17 MB

english, 1994

10

Correction to "Boundary single-layer routing with movable terminals"

Kuo-Feng Liao, Sarrafzadeh, M.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 102 KB

english, 1994

11

Reducing correlation to improve coverage of delay faults in scan-path design

Weiwei Mao, Ciletti, M.D.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 710 KB

english, 1994

12

Redundancy identification and removal in combinational circuits

Menon, P.R., Ahuja, H., Harihara, M.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 591 KB

english, 1994

13

Fault secure property versus strongly code disjoint checkers

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 736 KB

english, 1994

14

Hierarchical analysis of high frequency interconnect networks

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Année:

1994

Langue:

english

Fichier:

PDF, 623 KB

english, 1994