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[IEEE 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Dresden, Germany (2018.3.19-2018.3.23)] 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE) - Efficient synthesis of approximate threshold logic circuits with an error rate guarantee
Lai, Yung-An, Lin, Chia-Chun, Wu, Chia-Cheng, Chen, Yung-Chih, Wang, Chun-YaoAnnée:
2018
Langue:
english
DOI:
10.23919/DATE.2018.8342111
Fichier:
PDF, 288 KB
english, 2018