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A Flexible, Low-Power Analog PLL for SoC and Processors in 14nm CMOS
Shen, Kuan-Yueh, Farooq, Syed Feruz Syed, Fan, Yongping, Nguyen, Khoa Minh, Wang, Qi, Neidengard, Mark L., Kurd, Nasser, Elshazly, AmrAnnée:
2018
Langue:
english
Journal:
IEEE Transactions on Circuits and Systems I: Regular Papers
DOI:
10.1109/TCSI.2017.2784319
Fichier:
PDF, 3.25 MB
english, 2018