A 56-Gb/s PAM4 Wireline Transceiver Using a 32-Way Time-Interleaved SAR ADC in 16-nm FinFET
Frans, Yohan, Shin, Jaewook, Zhou, Lei, Upadhyaya, Parag, Im, Jay, Kireev, Vassili, Elzeftawi, Mohamed, Hedayati, Hiva, Pham, Toan, Asuncion, Santiago, Borrelli, Chris, Zhang, Geoff, Zhang, Hongtao, CVolume:
52
Langue:
english
Journal:
IEEE Journal of Solid-State Circuits
DOI:
10.1109/JSSC.2016.2632300
Date:
April, 2017
Fichier:
PDF, 3.82 MB
english, 2017
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