[IEEE 2016 IEEE International Solid-State Circuits Conference (ISSCC) - San Francisco, CA, USA (2016.1.31-2016.2.4)] 2016 IEEE International Solid-State Circuits Conference (ISSCC) - 4.7 A 65nm ReRAM-enabled nonvolatile processor with 6× reduction in restore time and 4× higher clock frequency using adaptive data retention and self-write-termination nonvolatile logic
Liu, Yongpan, Wang, Zhibo, Lee, Albert, Su, Fang, Lo, Chieh-Pu, Yuan, Zhe, Lin, Chien-Chen, Wei, Qi, Wang, Yu, King, Ya-Chin, Lin, Chrong-Jung, Khalili, Pedram, Wang, Kang-Lung, Chang, Meng-Fan, Yang,Année:
2016
Langue:
english
DOI:
10.1109/isscc.2016.7417918
Fichier:
PDF, 2.98 MB
english, 2016
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