IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
2015 / 12 Vol. 34; Iss. 12
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Exploring Multilevel Cache Hierarchies in Application Specific MPSoCs
Nawinne, Isuru, Javaid, Haris, Ragel, Roshan, Radhakrishnan, Swarnalatha, Parameswaran, SriVolume:
34
Langue:
english
Journal:
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
DOI:
10.1109/tcad.2015.2445736
Date:
December, 2015
Fichier:
PDF, 2.47 MB
english, 2015