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[IEEE International Verilog HDL Conference - Santa Clara, CA, USA (14-16 March 1994)] International Verilog HDL Conference - A purely behavioral data structure for accurate high level timing simulation of synchronous designs
Arnold, M.G., Bailey, T.A., Cowles, J.R., Cupal, J.J., Wallace, A.W.Année:
1994
Langue:
english
DOI:
10.1109/ivc.1994.323741
Fichier:
PDF, 524 KB
english, 1994