
Detailed Derivation and Minimization of the Equivalent Parasitic Capacitances of a High-Voltage Multiplier Based on the Complete Model
Wang, Jianing, de Haan, Sjoerd W. H., Ferreira, Jan AbrahamVolume:
51
Langue:
english
Journal:
IEEE Transactions on Industry Applications
DOI:
10.1109/TIA.2014.2330060
Date:
January, 2015
Fichier:
PDF, 738 KB
english, 2015