
Pipelined Decision Tree Classification Accelerator Implementation in FPGA (DT-CAIF)
Saqib, Fareena, Dutta, Aindrik, Plusquellic, Jim, Ortiz, Philip, Pattichis, Marios S.Volume:
64
Langue:
english
Journal:
IEEE Transactions on Computers
DOI:
10.1109/TC.2013.204
Date:
January, 2015
Fichier:
PDF, 606 KB
english, 2015