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[IEEE 2012 IEEE Symposium on VLSI Circuits - Honolulu, HI, USA (2012.06.13-2012.06.15)] 2012 Symposium on VLSI Circuits (VLSIC) - A 34fJ 10b 500 MS/s partial-interleaving pipelined SAR ADC
Zhu, Yan, Chan, Chi-Hang, Sin, Sai-Weng, U, Seng-Pan, Martins, R.P.Année:
2012
Langue:
english
DOI:
10.1109/vlsic.2012.6243804
Fichier:
PDF, 638 KB
english, 2012